Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Patent
1997-10-01
2000-04-11
Booth, Richard
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
438166, H01L 2184
Patent
active
060487577
ABSTRACT:
A thin film transistor of reversed stagger type having improved characteristics and yet obtained by a simple process, which is fabricated by selectively doping the semiconductor region on the gate dielectric to form the source, drain, and channel forming regions by using ion implantation, ion doping, or doping a plasma of ions; and then effecting rapid thermal annealing by irradiating a ultraviolet radiation, a visible light, or a near-infrared radiation for a short period of time. The source, drain, and channel forming regions are formed substantially within a single plane.
REFERENCES:
patent: 4266986 (1981-05-01), Benton et al.
patent: 4377421 (1983-03-01), Wada et al.
patent: 4561906 (1985-12-01), Calder et al.
patent: 4619034 (1986-10-01), Janning
patent: 4651408 (1987-03-01), MacElwee et al.
patent: 4698486 (1987-10-01), Sheets
patent: 4727044 (1988-02-01), Yamazaki
patent: 4743567 (1988-05-01), Pandya et al.
patent: 4769338 (1988-09-01), Ovshinsky
patent: 4814292 (1989-03-01), Sasaki et al.
patent: 4885258 (1989-12-01), Ishihara et al.
patent: 4888305 (1989-12-01), Yamazaki et al.
patent: 4959700 (1990-09-01), Yamazaki
patent: 4998152 (1991-03-01), Batey et al.
patent: 5061642 (1991-10-01), Fujioka
patent: 5070379 (1991-12-01), Nomoto et al.
patent: 5141885 (1992-08-01), Yoshida et al.
patent: 5162239 (1992-11-01), Winer et al.
patent: 5198379 (1993-03-01), Adan
patent: 5208476 (1993-05-01), Inoue
patent: 5219786 (1993-06-01), Noguchi
patent: 5264383 (1993-11-01), Young
patent: 5278093 (1994-01-01), Yonehara
patent: 5286658 (1994-02-01), Shirakawa et al.
patent: 5313077 (1994-05-01), Yamazaki
patent: 5315132 (1994-05-01), Yamazaki
patent: 5329140 (1994-07-01), Sera
patent: 5340999 (1994-08-01), Takeda et al.
patent: 5352291 (1994-10-01), Zhang et al.
patent: 5420048 (1995-05-01), Kondo
patent: 5495824 (1996-03-01), Yonehara et al.
patent: 5529937 (1996-06-01), Zhang et al.
patent: 5530265 (1996-06-01), Takemura
patent: 5541128 (1996-07-01), Kwasnick et al.
patent: 5543636 (1996-08-01), Yamazaki
patent: 5656511 (1997-08-01), Shindo
patent: 5696011 (1997-12-01), Yamazaki et al.
Ultra LSI Process Data Handbook, published by Science Forum, (1982), pp. 567-568 with English Description.
Inoue et al., "Low Temperature CMOS Self-Aligned Poly-Si TFTs and Circuit Scheme Utilizing New Ion Doping and Masking Technique", IEEE IEDM 91, Aug. 12, 1991, pp. 555-558.
S. Wolf et al., "Silicon Processing for the VLSI Era Vol. 1 Process Technology" Latice Press; Sundet Beach, CA (1986) pp. 175, 178-179.
T. Sameshima et al., "XeCL Excimer Laser Annealing Used to Fabricate Poly-Si TFT's", Japanese Journal of Applied Physics, vol. 28, No. 10, Oct. 1989, pp. 1789-1793.
K. Sera et al., "High Performance TFT's Fabricated by XeCL Excimer Laser Annealing of Hyfrogenated Amorphous-Silicon Film", IEEE Transactions on Election Devices, vol. 36, No. 12, (1989), pp. 2868-2872.
Kawachi et al., "Large-Area Doping Process For Fabrication of Poly-Si Thin Film Transistors Using Bucket Ion Source and XeCl Excimer Laser Annealing", Japanese Journal of Applied Physics, vol. 29, No. 12, Dec. 1990, pp. L2370-L2372.
Booth Richard
Costellia Jeffrey L.
Ferguson Jr. Gerald J.
Semiconductor Energy Laboratory Co,. Ltd.
LandOfFree
Insulated gate semiconductor device and process for fabricating does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Insulated gate semiconductor device and process for fabricating , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Insulated gate semiconductor device and process for fabricating will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1175997