Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Low workfunction layer for electron emission
Reexamination Certificate
2002-09-06
2003-12-30
Whitehead, Jr., Carl (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Low workfunction layer for electron emission
C257S079000, C313S309000, C313S313000
Reexamination Certificate
active
06670629
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention is related generally to field emitter devices and field emitter arrays incorporating such devices.
Field emitter arrays (FEAs) generally include an array of field emitter devices. Each emitter device, when properly driven, can emit electrons from the tip of the device. Field emitter arrays have many applications, one of which is in field emitter displays (FEDs), which can be implemented as a flat panel display.
FIG. 1
illustrates a portion of a conventional Field Emitter Device. The field emitter device
1
shown in
FIG. 1
is often referred to as a “Spindt-type” FEA. It includes a field emitter tip
12
formed on a semiconductor substrate
10
. Refractory metal, carbide, diamond and silicon tips, silicon carbon nanotubes and metallic nanowires are some of the structures known to be used as field emitter tips
12
. The field emitter tip
12
is adjacent to an insulating layer
14
and a conducting gate layer
16
. By applying an appropriate voltage to the conducting gate layer
16
, the current to the field emitter tip
12
passing through semiconductor substrate
10
is controlled.
FEAs typically operate in very high vacuums (often better than 10
−8
Torr for Spindt types and nanowires and 10
−7
Torr for nanotubes). This is because the gate voltages required to generate field emitted currents are also sufficient to produce an arc discharge between the gate and emitting tip at higher pressure levels consistent with other low vacuum electronic products. The vacuum requirements limit the number of FEA applications to those employing expensive high vacuum systems. The FEAs must also be handled with extreme care, often in clean rooms, because a simple dust particle can short out the gate-emitter circuit and destroy the device.
Thus, prior art FEAs, either those based on refractory metal tips or nanotubes or nanowires, are prone to arcing, and require good vacuums (10
−7
Torr or better) for operation. Further, prior art FEAs are sensitive to contamination by dust, skin oils etc. which can short out the devices. These requirements make prior art FEAs both difficult to handle and to utilize.
SUMMARY OF THE INVENTION
In accordance with one aspect of the present invention, there is provided a field emitter device on a substrate. The field emitter device comprises a first insulating layer, on the substrate; a conducting gate layer having a top surface and at least one side surface, disposed on the first insulating layer; a field emitter tip disposed on the substrate adjacent the first insulating layer and adjacent to the at least one side surface; and a second insulating layer disposed at least on at least one side surface located adjacent the field emitter tip to prevent arcing between the field emitter tip and the conducting gate layer.
In accordance with another aspect of the present invention, there is provided a field emitter array comprising an array of field emitter devices on a substrate. At least one of the field emitter devices of the array comprises a first insulating layer on the substrate; a conducting gate layer having a top surface and at least one side surface, disposed on the first insulating layer; a field emitter tip disposed on the substrate adjacent the first insulating layer and adjacent to the at least one side surface; and a second insulating layer disposed at least on at least one side surface located adjacent the field emitter tip to prevent arcing between the field emitter tip and the conducting gate layer.
In accordance with another aspect of the present invention, there is provided a method of forming a field emitter device on a substrate. The method comprises forming a first insulating layer on the substrate; forming a conducting gate layer having a top surface and at least one side surface on the first insulating layer; forming a field emitter tip on the substrate adjacent the first insulating layer and the conducting layer; and forming a second insulating layer on at least one side surface of the conducting gate layer adjacent the field emitter tip to prevent arcing between the field emitter tip and the conducting gate layer.
In accordance with another aspect of the present invention, there is provided a field emitter device on a substrate. The device comprises a first insulating layer on the substrate; a conducting gate layer having a top surface and at least one side surface, disposed on the first insulating layer; a field emitter tip disposed on the substrate adjacent the first insulating layer and adjacent to the at least one side surface; and an arc prevention layer disposed at least on at least one side surface located adjacent the field emitter tip to prevent arcing between the field emitter tip and the conducting gate layer.
In accordance with another aspect of the present invention, there is provided a field emitter array comprising an array of field emitter devices on a substrate. At least one of the field emitter devices of the array comprises a first insulating layer on the substrate; a conducting gate layer having a top surface and at least one side surface, disposed on the first insulating layer; a field emitter tip disposed on the substrate adjacent the first insulating layer and adjacent to the at least one side surface; and an arc prevention layer disposed at least on at least one side surface located adjacent the field emitter tip to prevent arcing between the field emitter tip and the conducting gate layer.
In accordance with another aspect of the present invention, there is provided a method of forming a field emitter device on a substrate. The method comprises forming a first insulating layer on the substrate; forming a conducting gate layer having a top surface and at least one side surface on the first insulating layer; forming a field emitter tip on the substrate adjacent the first insulating layer and the conducting layer; and forming an arc prevention layer on at least one side surface of the conducting gate layer adjacent the field emitter tip to prevent arcing between the field emitter tip and the conducting gate layer.
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Blum David S
GE Medical Systems Global Technology Company LLC
Jr. Carl Whitehead
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