Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – Polycrystalline semiconductor
Patent
1995-06-02
1999-12-14
Niebling, John F.
Semiconductor device manufacturing: process
Formation of semiconductive active region on any substrate
Polycrystalline semiconductor
438564, 438584, H01L 2120, H01L 2136
Patent
active
060017120
ABSTRACT:
In an insulated gate field effect semiconductor device, the gate electrode formed on the gate insulating film includes the first and second semiconductor layers as a double layer. An impurity for providing one conductivity type is not contained in first semiconductor layer which is in contact with a gate insulating film and is contained at a high concentration in the second semiconductor layer which is not in contact with the gate insulating film. Accordingly, By existence of the first semiconductor layer is which the impurity is not doped, the impurity is prevented from penetrating through the gate insulating film from the gate electrode and diffusing into the channel forming region. Also, by existence of the second semiconductor layer in which high concentration impurity is doped, the gate electrode has low resistance.
REFERENCES:
patent: 4354309 (1982-10-01), Gardiner
patent: 4394191 (1983-07-01), Wada
patent: 5021849 (1991-06-01), Pfiester et al.
patent: 5237196 (1993-08-01), Mikata et al.
patent: 5429972 (1995-07-01), Anjum et al.
patent: 5470794 (1995-11-01), Anjum et al.
Lebentritt Michael S.
Niebling John F.
Robinson Eric J.
Semiconductor Energy Laboratory Co,. Ltd.
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