Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1993-04-01
1994-11-08
Hille, Rolf
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257344, 257336, H01L 2978, H01L 29784
Patent
active
053629825
ABSTRACT:
A lightly doped source and a lightly doped drain are formed at a region which is adjacent to a heavily doped source and a heavily doped drain of FET and all or a part of which is under a gate electrode. In the lightly doped source and the lightly doped drain, an effective impurity atom concentration is gradually lowered from an inside of a substrate toward a surface thereof. Accordingly, a capacity between the gate and the drain is reduced and an operation speed of a circuit is enhanced. Hot carrier is generated at a deeper portion, which leads to an improvement for hot-carrier immunity. In a method of manufacturing it, only by changing conditions of implant and heat-treatment at manufacturing an FET with a conventional LATID structure the impurity atom concentration profile is improved. The effective impurity atom concentration at surfaces of lightly doped source and drain can be lowered by counter-doping.
REFERENCES:
patent: 4649629 (1987-03-01), Miller et al.
patent: 4746624 (1988-05-01), Cham et al.
Hori, "1/4-.mu.m LATID (LArge-Tilt-angle Implanted Drain) Technology for 3.3-V Operation", 1989 IEEE, pp. 32.4.1-4.
Hirase Junji
Hori Takashi
Fahmy Wael
Hille Rolf
Matsushita Electric - Industrial Co., Ltd.
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