Insulated-gate FET on an SOI-structure

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

257347, 257348, 257352, 257353, H01L 2978

Patent

active

052647218

ABSTRACT:
An SOI-type insulated-gate FET is formed such that an electrical resistance across a pn-junction of the source region is less than that across a pn-junction of the drain region. This is accomplished by providing the FET with a metal dopant, such as aluminum or tungsten; by excessively doping the source region; by providing an amorphous source region; or by providing a layer formed of a material having a different thermal expansion coefficient from the thermal expansion coefficient of the material forming the source region, upon the source region. In the thus fabricated transistor, there is generated a carrier generation center or a precipitation of the impurities at a pn-junction formed between the source region and the semiconductor substrate. Thus, a current path is formed across the pn-junction of the source region in both the forward and reverse directions of a diode of the pn-junction, so as to substantially eliminate the potential difference between the source region and the semiconductor substrate. Accordingly, a kink phenomenon in the drain voltage-current characteristics is eliminated.

REFERENCES:
patent: 4106045 (1978-08-01), Nishi
patent: 4225875 (1980-09-01), Ipri
patent: 4232327 (1980-11-01), Hsu
patent: 4312680 (1982-01-01), Hsu
patent: 4772927 (1988-09-01), Saito et al.
patent: 4797724 (1989-01-01), Boler et al.
patent: 4809056 (1989-02-01), Shirato et al.
patent: 4906587 (1990-03-01), Blake
patent: 4907053 (1990-03-01), Ohmi
patent: 5040037 (1991-08-01), Yamaguchi et al.
IEEE vol. SC-11 No. 4 Aug. 1976 High vol. SOS . . . performance Ronen et al.
Patent Abstracts of Japan, vol. 10, No. 275 (E-438)(2331).
Sep. 18, 1986 & JP-A-61 97964 (Toshiba Corp) May 16, 1986.
Patent Abstracts of Japan, vol. 10, No. 201 (E-419)(2257), Jul. 15, 1986 & JP-A-61-43475 (Agency of Ind Science & Technol), Mar. 3, 1986.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Insulated-gate FET on an SOI-structure does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Insulated-gate FET on an SOI-structure, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Insulated-gate FET on an SOI-structure will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1851567

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.