Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-02-03
2003-06-17
Lee, Eddie (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S364000, C257S368000, C257S372000, C257S378000, C257S557000, C257S587000
Reexamination Certificate
active
06580108
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to an insulated gate transistor, and more particularly, to an insulated gate transistor which is superior in preventing the latch-up phenomenon or current concentration of the transistor.
Currently, and insulated gate bipolar transistor (hereinafter abbreviated as IGBT) having a fast operation and a low on-resistance is used as a power switching device. The IGBT has a structure, wherein: a p-type base region extending from a main surface to its inner portion and a n-type emitter region extending from the base region to its inner portion are formed on one side of a main surface of a n-type semiconductor substrate, which operates as a drift region; a p-type collector region is formed on another side of the main surface of the semiconductor substrate separate from the base region; emitter electrodes are provided on the emitter region and the base region; and a collector electrode is provided on the collector region. The IGBT has the following feature. When a voltage, which makes the collector electrode have a positive potential relative to the emitter electrode, is applied to the collector electrode, and a positive voltage is applied to the gate electrode, electrons in the emitter region reach the collector region through channels and a drift region. The electrons, which reach the collector region, enhance injection of positive holes from the collector region. Accordingly, the drift region having a high resistance is conductivity-modulated to be a low resistance region, and an on-resistance lower than a MOSFET, the collector region of which is changed to a n-type drain region having no function to inject positive holes, is realized with approximately the same structure as a MOSFET.
When an IC is realized by combining the IGBT with other circuit elements, a lateral structure, wherein the emitter electrode, the collector electrode, and the gate electrode are provided on a same surface of the semiconductor substrate, is desirable in order to facilitate connection among the electrodes. An example of this structure is disclosed, for instance, in JP-A-5-29614 (1993).
On the other hand, in the IGBT, the conventional current which can be passed through a unit composed of a pair of collector-emitter electrodes is restricted. Therefore, a desired current capacity is realized by integrating a large number of unit IGBTS in the semiconductor substrate.
The IGBT disclosed in JP-A-5-29614 (1993) has a structure wherein the emitter region, the base region, and the collector region have a comb shape, respectively, and respective teeth portions of the emitter region and the base region are engaged with the collector region. Gate electrodes are provided on the base region, a drift region in the vicinity of the base region, and the emitter region via an insulating film. The emitter electrode and the collector electrode are provided on each of the emitter region and the base region, respectively. Both the emitter electrode and the collector electrode have a comb shape, and teeth portions of the emitter electrode and the collector electrode are engaged with each other.
Conventionally, polycrystalline silicon is used as the material of the gate electrode. However, in lateral IGBT having a conventional structure, a non-uniformity of the gate resistance is created due to the longitudinal resistance of the gate electrode, and the turn-off action is delayed at the portion having a large gate resistance in a turn-off operation.
Most of the load of the inverter device generally comprises an inductive loads. Therefore, at that time, a current concentration is generated at the portion where the turn-off action is delayed, in addition to the effect of maintaining the flow of the large current due to an inductance. As a result, a latch-up phenomenon is caused at that portion. Accordingly, there has been a problem in that the current which is controllable by the IGBT is restricted to a lower level than a designed value.
In order to decrease the delay of the operation time in the element, technology to decrease the resistance of the gate electrode has been disclosed in JP-A-10-173176 (1998) and other publications. However, the technology relates to the structure of a vertical IGBT, and any idea to integrate an IGBT and a driving circuit for composing an integrated circuit has not been considered.
SUMMARY OF THE INVENTION
One of the objects of the present invention is to provide an insulated gate transistor having an improved latch-up preventing performance by decreasing the resistance of the gate electrode.
The feature of the insulated gate transistor for achieving the above object by the present invention is in providing a metallic wiring layer on the emitter electrode via an insulating layer; providing plural regions insulated from a first main electrode in the first main electrode; and connecting the metallic wiring layer electrically with the gate electrode through the plural regions insulated from the first main electrode.
REFERENCES:
patent: 5343052 (1994-08-01), Oohata et al.
patent: 5729032 (1998-03-01), Tomomatsu et al.
patent: 5731605 (1998-03-01), Schlangenotto et al.
patent: 5893736 (1999-04-01), Lee et al.
patent: 6194763 (2001-02-01), Hisamoto et al.
patent: 61-44854 (1986-03-01), None
patent: 5-29614 (1993-02-01), None
patent: 05-029614 (1993-05-01), None
patent: 10173176 (1998-06-01), None
Ozeki Shoichi
Suda Koichi
Utsumi Tomoyuki
Lee Eddie
Warren Matthew E.
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