Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-04-30
2004-01-27
Tran, Minh Loan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S331000, C257S139000, C257S147000
Reexamination Certificate
active
06683348
ABSTRACT:
TECHNICAL FIELD
This invention relates to a semiconductor device having an insulated gate. More particularly, the invention relates to a gate-insulated bipolar transistor that is favorably used as a power switching element.
BACKGROUND OF THE INVENTION
As a power switching element, in recent years, there has been widely used an element called Insulated Gate Bipolar Transistor (hereinafter referred to as IGBT).
FIGS. 10
to
13
are diagrams illustrating the basic constitution of a conventional IGBT, wherein
FIG. 10
is a plan view of the main surface of a semiconductor substrate illustrating the constitution of the conventional IGBT,
FIG. 11
is a sectional view of the IGBT along a line XI—XI of
FIG. 10
,
FIG. 12
is a sectional view of the IGBT along a line XII—XII of
FIG. 10
, and
FIG. 13
is a sectional view of the IGBT along a line XIII—XIII of FIG.
10
.
In
FIGS. 10
to
13
, reference numeral
50
denotes an n-layer serving as a semiconductor substrate of a first conductivity type,
51
denotes a p-collector layer serving as a collector region of a second conductivity type,
52
denotes a collector electrode which is in contact with the p-collector layer
51
, reference numeral
53
denotes a p-base layer selectively formed in the main surface of the semiconductor substrate
50
and serving as a first base region of the second conductivity type, and
54
denotes an n
+
-emitter layer of the first conductivity type selectively formed in the p-base region
53
. Reference numeral
55
denotes a gate electrode, and
56
denotes a gate oxide film serving as a gate insulating film. A belt-like gate electrode
55
is formed on the surface of the p-base layer
53
sandwiched between the n
−
-layer
50
and the n
+
-layer
54
, and on the surface of the n
−
-layer
50
via the gate oxide film
56
. Reference numeral
57
denotes a belt-like emitter electrode which is formed so as to be in contact with both a cleat
58
a
of the ladder-like n
+
-layer
54
and the p-base layer
53
exposed in the opening portion
59
of the ladder, and so as to cover them. Reference numeral
60
denotes a channel region formed near the surface of the p-base layer
53
sandwiched between the n
−
-layer
50
and the n
+
-layer
54
.
When observed from the surface as described above, the n
+
-emitter layer
54
is formed like a ladder, and a portion that comes in contact with both the emitter of the emitter electrode
57
and the p-base layer
53
, is arranged perpendicularly to the cleat
58
a
of ladder and in parallel with a crossbeam
58
b
of ladder. At the end portion of a cell of a striped shape, a contact region
61
of the emitter electrode is protruding longer than the crossbeam
58
b
of ladder of the source.
Operation of the IGBT shown in
FIGS. 10
to
13
will now be described below. If the emitter electrode
57
is grounded, and a positive voltage is applied to the gate electrode
55
and to the collector electrode
52
, then, the electric potential of the surface of the p-base layer
53
just under the gate insulating film
56
is inverted to form an n-type channel. Electrons flow into the channel region
60
to turn the IGBT on.
In this case, the resistance decreases in the region of the n
−
-layer
50
with the result that the electric conductivity of the n
−
-layer
50
is modulated by the injection of holes into the n
−
-layer
50
from the p-collector layer
51
on the side of the collector electrode
52
. Due to the modulation in the electric conductivity, the IGBT exhibits a low on-resistance in its ON state accompanied. On the contrary, the IGBT has a fault that it easily latches up due to its parasitic thyristor structure.
When the IGBT is in the ON state, holes are injected into the n
−
-layer
50
from the p-collector layer
51
on the side of the collector electrode
52
as described above. The holes partly extinguish upon being recombined with electrons injected into the n
−
-layer
50
from the n
+
-emitter layer
54
through the channel, and partly escape into the emitter electrode
57
passing through a pinch resistor portion in the p base layer
53
. Generally, the holes are not injected into the n
+
-emitter layer
54
due to a built-in voltage across the p-base layer
53
and the n
+
-emitter layer
54
. Accordingly, the parasitic thyristor is not turned on, and the IGBT is not latched up.
If a pinch resistance of a portion of the p-base layer
53
where the hole current flows through is denoted by Rb and the hole current by Jh, then, a voltage expressed by the product of Rb and Jh is produced across the p base layer
53
and the n
+
-emitter layer
54
. If this voltage becomes larger than the above built-in voltage, the holes are injected from the p-base layer
53
to the n
+
-emitter layer
54
and, hence, electrons are injected from the n
+
-emitter layer
54
to the p-base layer
53
. That is, a parasitic npnp thyristor formed by n
+
-emitter layer
54
, p-base layer
53
, n
−
-layer
50
and collector layer
52
, is latched up making it difficult to control the current, and resulting in a breakage. The breakage can be effectively prevented by lowering the pinch resistance Rb or the hole current Jh.
The IGBT chip has a structure in which the basic cells of the structure shown in
FIGS. 10
to
13
are arranged like a stripe. In a portion where the electric current concentrates in the chip, a contrivance has been made so that the latch-up will not easily take place. For example, the end portion of the cell is one of the portions where the electric current tends to concentrate. The emitter of this portion has a shape as shown in
FIG. 10
in which the contact region
61
of the emitter electrode protrudes longer than the crossbeam
58
b
of ladder of the source. Owing to this structure, no electron is supplied at the end portion of the cell. Therefore, only a small hole current Jh is injected from the p-collector region
51
and the parasitic thyristor is not easily turned on.
In the conventional IGBT which is a semiconductor device having a structure which is not easily latched up, the contact region of the emitter electrode
61
is protruded longer than the crossbeam
58
b
of ladder of the source at the end portion of the cell. This structure help to improve endurance against the breakage, but at the same time it causes the following problems.
That is, since there is formed no emitter region at the end portion of the cell, the channel length becomes short per a unit area, and invalid region increases. This results in an increase in the current density and, hence, in an increase in the ON voltage, which is a problem.
This invention was accomplished in order to solve the above problems, and has an object of providing a semiconductor device capable of lowering the ON voltage by decreasing the area of the invalid region compared to that of prior art yet maintaining the ability for suppressing the latch-up to a degree comparable to that of the conventional IGBTs.
DISCLOSURE OF THE INVENTION
This invention is concerned with a semiconductor device comprising a semiconductor layer of a first conductivity type, a collector layer of a second conductivity type formed on one surface of the semiconductor layer, a base layer of the second conductivity type formed on the other surface of the semiconductor layer, and an emitter layer of the first conductivity type formed in the base layer, wherein the emitter layer having a shape of a ladder being constituted by two crossbeams and cleats formed between the crossbeams, and the cleat being provided even between facing end portions of the two crossbeams.
This makes it possible to obtain a semiconductor structure in which the area of the invalid region is minimized.
There are further provided an emitter electrode formed on the semiconductor layer and having a contact part that comes in contact with the base layer and the emitter layer, and gate electrodes formed on both sides of the contact part on the semicond
Haruguchi Hideki
Tomomatsu Yoshifumi
Dickey Thomas L
Tran Minh Loan
LandOfFree
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