Instructions signature and primary input and primary output extr

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

716 18, 703 16, 714 30, 714 39, 714727, 714732, G06F 1750, G01R 31303, G01R 313187

Patent

active

061417904

ABSTRACT:
A computerized method and system for automatically extracting an IEEE 1149.1 standard design from a netlist and performing compliance checking. The present invention receives the TAP (test access port) description and compliance enable ports of a netlist. The TAP controller is extracted and its state ports are identified, referenced in a boundary scan design database (BSDD) and its states are verified. The TAP controller is controlled so that the instruction register is located and referenced in the BSDD. The TAP controller is controlled so that the bypass register is found and the BSDD is updated. The TAP controller is controlled so that the shift and update cells of the boundary scan register (BSR) are found, the control, input and output BSR cells are characterized and the BSDD is updated. Primary input and output information is also inferred and the device.sub.-- ID register is found. Frontier pins are used to locate signatures of the remaining instructions and their test data registers are found. To infer the SAMPLE instruction, instructions selecting the BSR are groups and those that do not exhibit the behavior of the SAMPLE instruction are eliminated. Primary inputs and primary outputs are then inferred. The following instructions are then inferred: INTEST, HIGHZ, CLAMP, IDCODE and RUNBIST. As each of the above elements of the IEEE 1149.1 design are located, they are used to update the BSDD and are also inherently verified for compliance by the present invention. Intolerable violations flag a non-compliant design.

REFERENCES:
patent: 5333139 (1994-07-01), Sturges
patent: 5497378 (1996-03-01), Amini et al.
patent: 5517637 (1996-05-01), Bruce, Jr. et al.
patent: 5682392 (1997-10-01), Raymond et al.
patent: 5765035 (1998-06-01), Tran
patent: 5809036 (1998-09-01), Champlin
patent: 6012155 (2000-01-01), Beausang et al.
Raymond et al. ("Algorithmic extraction of BSDL from 1149.1-compliant sample ICs", Proceedings of the 1995 International Test Conference, Oct. 21, 1995, pp. 561-568).
Test Technology Standards Committee of the IEEE Computer Society ("Supplement to IEEE Std 1149.1-1990, IEEE standard test access port and boundary-scan architecture", IEEE Std 1149.1b-1994, Mar. 1, 1995, pp. viii + 66).
Pitty et al. ("A simulation-based protocol-driven scan test design rule checker", Proceedings of the 1994 International Test Conference, Oct. 2, 1994, pp. 999-1006.
Oyama et al. ("Scan design oriented test technique for VLSI's using ATE", Proceedings of the 1996 Test Conference, Oct. 20, 1996, pp. 453-460).
Robinson et al. ("Technology-independent boundary scan synthesis (technology and physical issues)", Proceedings of the 1993 Test Conference, Oct. 17, 1993, pp. 157-166).
Varma ("TDRC-a symbolic simulation based design for testability rules checker", Proceedings of the 1990 International Test Conference, Sep. 10, 1990, pp. 1055-1064).

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Instructions signature and primary input and primary output extr does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Instructions signature and primary input and primary output extr, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Instructions signature and primary input and primary output extr will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2065744

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.