Instruction-level multithreading according to a...

Electrical computers and digital processing systems: processing – Processing control

Reexamination Certificate

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Reexamination Certificate

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07925869

ABSTRACT:
A system and method for enabling multithreading in a embedded processor, invoking zero-time context switching in a multithreading environment, scheduling multiple threads to permit numerous hard-real time and non-real time priority levels, fetching data and instructions from multiple memory blocks in a multithreading environment, and enabling a particular thread to modify the multiple states of the multiple threads in the processor core.

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