Electrical computers and digital processing systems: processing – Instruction issuing – Simultaneous issuance of multiple instructions
Reexamination Certificate
2007-09-11
2007-09-11
Treat, William M. (Department: 2181)
Electrical computers and digital processing systems: processing
Instruction issuing
Simultaneous issuance of multiple instructions
Reexamination Certificate
active
11050344
ABSTRACT:
An improved method, apparatus, and computer instructions for grouping instructions processed in equal sized sets. A current set of instructions is received in an instruction cache for dispatching. A determination is made as to whether any instructions in the current set of instructions are part of a group including a prior set of instructions received in the instruction cache including using a history data structure, wherein the history data structure contains data regarding instructions in the prior set of instructions. Any instructions are grouped into the group with the instruction in response to a determination that the any instructions are part of the group. Instructions in the group units are dispatched to execution using the history data structure, wherein invalid instruction dispatch groupings are avoided.
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Konigsburg et al., Fetch-Side Instruction Dispatch Group Formation.
Le Hung Qui
Levitan David Stephen
Ward, III John Wesley
Bailey Wayne P.
Treat William M.
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