Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing
Reexamination Certificate
2011-06-07
2011-06-07
Pan, Daniel (Department: 2183)
Electrical computers and digital processing systems: processing
Dynamic instruction dependency checking, monitoring or...
Scoreboarding, reservation station, or aliasing
C712S216000
Reexamination Certificate
active
07958339
ABSTRACT:
An instruction execution control device operates a plurality of threads in a simultaneous multi-thread system. And the instruction execution control device has a thread selection circuit (30) which detects a state where an instruction has not been completed for a predetermined period during simultaneous multi-thread operation, and controls such that all the reservation stations (5, 6and7) can execute only a predetermined thread. Therefore if an entry that cannot be executed from the reservation stations (5, 6and7) exists, execution of an entry in the thread that cannot be executed can be enabled by stopping the execution of the thread which has been executed continuously.
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Akizuki Yasunobu
Yoshida Toshio
Fujitsu Limited
Fujitsu Patent Center
Pan Daniel
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