Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2007-02-20
2007-02-20
Elmore, Reba I. (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S125000
Reexamination Certificate
active
10953669
ABSTRACT:
Systems, methodologies, media, and other embodiments associated with cache systems are described. One exemplary system embodiment includes an instruction cache comprising single-ported memories. The example system can further include a cache control logic configured to process cache events of different types that may be received by the instruction cache, and being configured with a multi-stage pipeline that coordinates processing of the cache events to the single-ported memories. The multi-stage pipeline can have different stages pre-assigned as read/write stages for the cache events to minimize access conflicts between the cache events.
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Elmore Reba I.
Hewlett--Packard Development Company, L.P.
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