Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Addressing cache memories
Reexamination Certificate
2007-05-24
2010-06-22
Bragdon, Reginald G (Department: 2189)
Electrical computers and digital processing systems: memory
Addressing combined with specific memory configuration or...
Addressing cache memories
C711S125000, C711S128000, C711S216000, C711SE12018
Reexamination Certificate
active
07743200
ABSTRACT:
In general, this disclosure describes techniques of storing data in and retrieving data from a cache of a computing device. More specifically, techniques are described for utilizing a “perfect hash” function to implement an associative cache within a computing device. That is, the associative cache implements a fully associative map between a predetermined set of addresses and data values, employing only a single tag fetch comparison.
REFERENCES:
patent: 5530958 (1996-06-01), Agarwal et al.
patent: 5694567 (1997-12-01), Bourekas et al.
patent: 6161166 (2000-12-01), Doing et al.
patent: 6275919 (2001-08-01), Johnson
patent: 7290116 (2007-10-01), Grohoski et al.
patent: 2003/0196026 (2003-10-01), Moyer
patent: 2006/0004995 (2006-01-01), Hetherington et al.
Hallnor, Erik G. and Steven K. Reinhardt. “A Fully Associative Software-Managed Cache Design.” Jun. 2000. ACM. ISCA 2000.
Beale, Jay; Renaud Deraison; Haroon Meer; Roelof Temmingh; and Cherl Van Der Walt. Snort 2.0 Intrusion Detection. Mar. 1, 2003. Syngress. Section 1.2.
Vandierendock, Hans; Philippe Manet; and Jean-Didier Legat. “Application Specific Reconfigurable XOR-Indexing to Eliminate Cache Conflict Misses.” Mar. 2006. IEEE. Date '06.
Hogg, Robert V. and Elliot A. Tanis. Probability and Statistical Inference. 2001. Prentice-Hall Inc. 6th ed. pp. 5-8.
F. C. Botelho et al., “A New Algorithm for Constructing Minimal Perfect Hash Functions,” Technical Report TR004/04, Department of Computer Science, Federal University of Minas Gerais, 2004, Oct. 2004.
F. C. Botelho et al., “A Practical Minimal Perfect Hashing Method,”4th International Workshop on Efficient and Experimental Algorithms(WEA05), Springer-Verlag Lecture Notes in Computer Science, vol. 3503, Santorini Island, Greece, May 2005, 488-500.
Bob Jenkins, “An order preserving minimal perfect hashing algorithm,” available at http://burtleburtle.net/bob/hash/perfect.html (last visited Apr. 4, 2007).
Panwar Ramesh
Thomas Philip A.
Bragdon Reginald G
Juniper Networks, Inc.
Sadler Nathan
Shumaker & Sieffert P.A.
LandOfFree
Instruction cache using perfect hash function does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Instruction cache using perfect hash function, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Instruction cache using perfect hash function will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4186841