Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2009-05-04
2011-12-27
Le, Vu (Department: 2824)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S125000
Reexamination Certificate
active
08086802
ABSTRACT:
An instruction cache system includes an instruction-cache data storage unit that stores cache data per index, and an instruction cache controller that compresses and writes the cache data in the instruction-cache data storage unit, and controls a compression ratio of the written cache data. The instruction cache controller calculates a memory capacity of a redundant area generated due to compression in a memory area belonging to an index, in which n pieces of cache data are written based on the controlled compression ratio, to compress and write new cache data in the redundant area based on the calculated memory capacity.
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Kabushiki Kaisha Toshiba
Le Vu
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
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