Instant configuration of a digital device

Electrical computers and digital data processing systems: input/ – Intrasystem connection – System configuring

Reexamination Certificate

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Details

C710S008000, C710S010000, C713S001000, C713S002000, C713S400000, C709S220000

Reexamination Certificate

active

06542945

ABSTRACT:

FIELD OF INVENTION
This invention relates generally to a digital-platform, and in particular to configuring the digital platform.
BACKGROUND OF THE INVENTION
FIG. 1
illustrates a typical computer system. Referring to
FIG. 1
, a memory controller hub
110
controls the flow of data between the system memory
120
of a computer
100
and other components of the computer, such as the CPU
130
, input-output (I/O) controller
150
, or a graphics engine
140
. The controller is programmed to adjust the flow of data between system components as a function of the system components' characteristics.
For example, if a computer system architecture has a 600 MHz CPU, 128 MB RAM of system memory, and a 100 MHz bus, these characteristics are programmed into the memory controller. The features of data transfer, such as arbitration, bandwidth, memory access ranges, and memory timings are then optimized by the memory controller as a function of the system architecture.
The memory controller is programmable so that if the system architecture changes, the controller can be reprogrammed, or reconfigured, to adjust the flow of data based on the characteristics of the new system components. Typically the memory controller is programmed when a computer system is powered up. The BIOS programs the memory controller based on the system components, such as a system memory, CPU, and graphics engine.
One problem of programming the controller is that only one register of the memory controller is programmed at a time. If the memory controller has 10,000 registers, for example, then 30 to 40 clock cycles are needed to program each register of the memory controller. This delay can be very long, especially for applications that require the system architecture to change on a frequent basis.
For example, a simulation model of a computer system architecture is used to simulate the effects that different types of components have on the overall performance of a computer system. During simulation, one component, such as the CPU for example, is modeled to perform with different operating characteristics, such as clock speed. Every time the clock speed of the CPU model changes, the configuration of the memory controller should change as well, so that the system performance is optimized for the new clock speed. The delay caused by reconfiguring the memory controller reduces the efficiency of the simulation testing of the system architecture.
SUMMARY OF THE INVENTION
An apparatus and method for instantly configuring a controller are provided. In one embodiment, a controller is configured by selecting a configuration input vector, and placing at least a portion of the configuration input vector in a plurality of registers in the controller during a single clock cycle.


REFERENCES:
patent: 5164988 (1992-11-01), Matyas et al.
patent: 5258934 (1993-11-01), Agranat et al.
patent: 5437043 (1995-07-01), Fujii et al.
patent: 5513366 (1996-04-01), Agarwal et al.
patent: 5634033 (1997-05-01), Stewart et al.
patent: 5832288 (1998-11-01), Wong
patent: 6178502 (2001-01-01), Caswell et al.

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