Data processing: measuring – calibrating – or testing – Measurement system in a specific environment – Quality evaluation
Reexamination Certificate
2006-07-04
2006-07-04
Bui, Bryan (Department: 2863)
Data processing: measuring, calibrating, or testing
Measurement system in a specific environment
Quality evaluation
C382S145000
Reexamination Certificate
active
07072786
ABSTRACT:
Techniques for efficiently setting up inspection, metrology, and review systems for operating upon semiconductor wafers are described. Specifically, this involves setting up recipes that allows each system to accurately inspect semiconductor wafers. The invention gathers pertinent information from these tools and presents the information to users in a way that greatly reduces the time required to complete a recipe. One system embodiment includes an inspection system and a review station that is communicatively linked such that the review station can read from and write to an entire set of data stored at the inspection system. The set of data includes image files of features detected by the inspection system.
REFERENCES:
patent: 5539752 (1996-07-01), Berezin et al.
patent: 5598341 (1997-01-01), Ling et al.
patent: 5801965 (1998-09-01), Takagi et al.
patent: 5991699 (1999-11-01), Kulkarni et al.
patent: 6169282 (2001-01-01), Maeda et al.
patent: 6259520 (2001-07-01), Zeimantz
patent: 6300629 (2001-10-01), Lawrence
patent: 6362013 (2002-03-01), Yoshimura
patent: 6393602 (2002-05-01), Atchison et al.
patent: 6407386 (2002-06-01), Dotan et al.
patent: 6426501 (2002-07-01), Nakagawa
patent: 6477685 (2002-11-01), Lovelace
patent: 6507933 (2003-01-01), Kirsch et al.
patent: 6542830 (2003-04-01), Mizuno et al.
patent: 6598210 (2003-07-01), Miwa
patent: 6610980 (2003-08-01), Veneklasen et al.
patent: 6635872 (2003-10-01), Davidson
patent: 6674890 (2004-01-01), Maeda et al.
patent: 6792367 (2004-09-01), Hosoya et al.
patent: 6826735 (2004-11-01), Ono et al.
patent: 6850854 (2005-02-01), Naya et al.
patent: 6876445 (2005-04-01), Shibuya et al.
patent: 6903821 (2005-06-01), Nara et al.
patent: 6914441 (2005-07-01), Talbot et al.
patent: 6919504 (2005-07-01), McCutcheon et al.
patent: 6930308 (2005-08-01), Lorusso et al.
patent: 6937754 (2005-08-01), Eguchi
patent: 6959251 (2005-10-01), Coldren et al.
patent: 2004/0038454 (2004-02-01), Coldren et al.
Usami et al., Semiconductor Inspection System for Yield Enhancement, 1999, Hitachi review, vol. 48, No. 6, pp. 354-360.
US Office Action mailed Apr. 1, 2004, from U.S. Appl. 10/298,389.
US Office Action mailed Aug. 23, 2004, from U.S. Appl.10/298,389.
US Office Action mailed Mar. 31, 2005, from U.S. Appl. 10/298,389.
US Office Action mailed Jan. 21, 2005, from U.S. Appl.10/298,389.
Usami et al, Semiconductor Inspection System for Yield Enhancement, 1999, Hitachi review, vol. 48, No. 6, pp. 354-360.
Aji Prashant A.
Coldren David Bruce
McCauley Sharon Marie
Randall David Winslow
Beyer Weaver & Thomas LLP
Bui Bryan
KLA-Tencor Technologies Corporation
Le Toan M.
LandOfFree
Inspection system setup techniques does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Inspection system setup techniques, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Inspection system setup techniques will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3538994