Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2001-02-20
2003-09-09
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
06618850
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a method and system for manufacturing a wafer having a fine circuit pattern such as a semiconductor device, or liquid crystal. More particularly, the invention relates to a technique of inspecting a pattern of a semiconductor device or a photomask, and to an inspecting method and system using a charged particle beam, for inspecting a defect in an arbitrary part on an unfinished semiconductor wafer in a semiconductor device fabricating process.
A semiconductor device is manufactured by, for example, repeating a step of transferring a pattern formed with a photomask on a semiconductor wafer by a lithography process and an etching process. In a manufacturing step of a semiconductor device, whether the lithography process, etching process, and the like are successfully performed or not exerts a large influence on the yield of the semiconductor device. It is consequently important to detect occurrence of an abnormal state or a failure at an early stage or before it occurs. Particularly, to improve the yield, it is important to measure electric resistance and electric capacitance of a contact hole and an interconnection in a partially finished semiconductor wafer at an early stage of the manufacturing process. There are the following conventional techniques of performing inspections to detect an electrical defect.
One of the techniques is a nano-probe device JP-A No. H8-160109) for measuring electric resistance by making a sharpened tungsten (W) needle (with the tip having a radius of curvature of about 0.1 &mgr;m) come into direct contact with a measurement portion. As patterns become finer in recent years, however, the size of a portion to be measured becomes about the same or smaller than that of the W needle, so that the measurement is becoming very difficult. As means for dealing with the problem, it can be considered to reduce the radius of curvature of the tip of the W needle. In this case, however, the tip becomes very soft and is consequently deformed when it comes into contact with the portion to be measured. The method is not a realistic one. Another problem is contact resistance. When the needle and the portion to be measured are made of different materials, especially, one of them is made of a semiconductor, a Schottky junction occurs, and electric resistance depending on a voltage occurs in the portion. Consequently, accurate measurement cannot be performed.
Another conventional technique uses a SEM (Scanning Electron Microscope) and is disclosed in JP-A No. H5-258703, JP-A No. H11-121561, and JP-A No. H6-326165.
According to the technique disclosed in JP-A No.H5-258703, an image to be inspected is compared with an adjacent image, and a portion having different potential contrast (brightness) is determined as a defect, thereby detecting a defect. The technique, however, does not have means for obtaining and displaying electric characteristics (electric resistance and electric capacitance) and, therefore, cannot determine whether the portion is critical or not.
According to the technique disclosed in JP-A No. H11-121561, the degree of emission of secondary electrons is controlled by a control electrode positioned on a wafer, the surface of the wafer is charged positively or negatively, and a normal portion, a low-resistance defective portion, and a high-resistance defective portion are determined from a voltage contrast image obtained at this time.
Control of the emission of secondary electrons by the control electrode is disclosed in JP-A No. S59-155941. For example, in a voltage contrast image obtained in the case where the control electrode is adjusted to be positively charged, a low-resistance defective portion (for example, low resistance of few hundreds &OHgr;) is light, a high-resistance defective portion (electric resistance: ∞) is dark, and a normal portion is light but is darker than the low-resistance defective portion since the normal portion has resistance higher than the low-resistance defective portion. From the lightness/darkness of the image, the resistance can be determined to be high or low, but an absolute value cannot be calculated. By measuring a leak current, electric resistance can be calculated. However, it takes time for the inspection and the electric resistance cannot be measured at high speed.
According to the technique disclosed in JP-A No. H6-326165, an interconnection on a substrate is irradiated with electron beams, a dielectric current is generated between the substrate and the ground by charges generated by the irradiation, and a change with time is measured. Although the electric capacitance can be measured to be large or small, an absolute value cannot be measured.
In an inspection using such a voltage contrast image of the SEM, in some cases, a difference in potential contrast between the normal portion and the defective portion is small depending on the structure of a wafer, and it is difficult to detect a defect. For example, in the case where a circuit has a pn junction, when the pn junction is reverse-biased by charges which are generated in association with irradiation of electron beams, the portion becomes high-resistant. Due to this, it is difficult to discriminate the portion from a high-resistant portion with faulty electrical continuity.
As described above, since the nano-probe device has a problem such that a portion to be measured is smaller than the tip of the needle and a problem of the contact resistance between the needle and a sample, accurate electric resistance cannot be measured depending on a sample. It takes very long time to inspect the whole face of a wafer and is substantially impossible to conduct the inspection. Although an apparatus using the SEM can determine whether the electric resistance is high or low and whether the electric capacitance is large or small from a voltage contrast image but cannot estimate an absolute value. Although a resistance value can be calculated by measuring a leak current, it takes time for an inspection, the inspection cannot be conducted at high speed, and it takes very long time to inspect the whole face of a wafer. Further, depending on the structure of a wafer (for example, when a pn junction is formed), it is difficult to discriminate a normal portion from a defective portion in a voltage contrast image.
SUMMARY OF THE INVENTION
An object of the invention is to provide an inspection method and system for automatically calculating values of electric resistance and electric capacitance and obtaining distributions and tendencies of electric resistance and electric capacitance of the surface of a substrate such as a wafer in short time only by acquiring a voltage contrast image. Another object is to provide appropriate inspection parameters corresponding to the structure of a wafer.
The inventors of the present invention have found that the objects can be achieved by using the fact that a charged particle beam image (voltage contrast image) obtained by irradiating a sample with a charged particle beam depends on electric resistance and electric capacitance between the irradiation region and the ground and irradiation time.
The mechanism will be described by referring to FIG.
2
. Electrons are used as an example of particles applied. It is assumed that an incident energy EPE is about 500 eV where emission efficiency &sgr; of the sum of secondary electrons and back scattered electrons is larger than 1. Usually, an electron having energy equal to or smaller than 50 eV is called a secondary electron and an electron having energy larger than 50 eV is called a back scattering electron. When an insulator
60
is irradiated with an electron beam, an electron beam irradiated region
61
is charged positively (a case where it is charged at 4V is shown as an example), and a potential barrier of Us [eV] is formed on the surface.
Consequently, as shown by an energy ESE distribution of the sum NSE of the number of secondary electrons and back scattered electrons of
FIG. 3
, the secondary electrons and back sca
Nishiyama Hidetoshi
Nozoe Mari
Shinada Hiroyuki
Bowers Brandon
Hitachi , Ltd.
Mattingly Stanger & Malur, P.C.
Siek Vuthe
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