Input termination circuitry with high impedance at power off

Details Input termination circuitry with high impedance at power off Input termination circuitry with high impedance at power off

2008-05-06

2008-05-06

Chang, Daniel (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Bus or line termination

C326S034000, C326S086000

Reexamination Certificate

active

07368938

ABSTRACT:
An input termination circuit includes a first and a second resistor each having a terminal respectively coupled to a first and a second input terminal of the input termination circuit, a first and a second transistor coupled in series between the first resistor and the second resistor, and a third transistor having two terminals respectively coupled to the control circuit and a node between the first and the second transistor. The gate of the third transistor is coupled to ground. The gates of the first and the second transistor are coupled to a control circuit that is adapted to provide a control signal to turn the first and the second transistor on or off.

REFERENCES:
patent: 6683473 (2004-01-01), Fotouhi
patent: 2005/0225353 (2005-10-01), Kwon

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