Static information storage and retrieval – Read/write circuit – Simultaneous operations
Patent
1997-10-09
1999-04-27
Hoang, Huan
Static information storage and retrieval
Read/write circuit
Simultaneous operations
36518902, 36523002, 36523003, G11C 1604
Patent
active
058986235
ABSTRACT:
A high speed
arrow I/O DRAM device comprises both a data input/output (I/O) port as well as a command port for receiving commands used to control the operations of the DRAM. The command port is defined as input only (i.e., for inputting command data). The present invention comprises multiplexing write data to be written and stored in the DRAM onto the command port with command data packets. The data I/O port can then become dedicated to streaming out seamless data since it no longer needs to flip between input and output data. Even greater bus efficiency can be realized if, during a command packet transfer, data writes to the DRAM are switched back to the data I/O port. With this input port switching protocol, greater bus efficiency and increased memory performance can be realized.
REFERENCES:
patent: 4882709 (1989-11-01), Wyland
patent: 5511024 (1996-04-01), Ware et al.
patent: 5642387 (1997-06-01), Fukasawa
patent: 5768211 (1998-06-01), Jones et al.
Clinton Michael Patrick
Dell Timothy Jay
Hedberg Erik Leigh
Kellogg Mark William
Pricer Wilbur David
Hoang Huan
International Business Machines - Corporation
Walsh Robert A.
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