Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1994-06-23
1995-07-11
Ngo, Ngan V.
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257360, 257362, 257363, H01L 2906, H01L 2978
Patent
active
054323690
DESCRIPTION:
BRIEF SUMMARY
TECHNICAL FIELD
The present invention relates to an input protection circuit for protecting an internal input circuit or to an output protection circuit for protecting an internal output circuit (collectively called an i/o protection circuit hereinafter) when an excessive input voltage is applied to an external electrode of a semiconductor device.
BACKGROUND TECHNOLOGY
A diode and resistors are arranged on the side of the input electrode relative to an input protection MOS transistor for lengthening a rise time of a voltage surge input thereto to cope with an abrupt surge of voltage by way of the time constant of the junction capacitance of the diode and the resistances of the resistors.
The output circuit is substantially identical to the i/o protection circuit for protecting the input circuit which is described above. In case of the output protection circuit, an output MOS transistor itself serves as the output protection MOS transistor. Since the output MOS transistor generally occupies a large area, the protection diode serving as a capacitor is not used.
The conventional input or output protection circuit, however, reacts as a delay element also to normal signals since it is equipped with a protection diode and protection resistors for lengthening the rise time of input voltage. As a result, the transmission of a signal in the input or output circuit is delayed so that speeding up device operation as a whole is prevented. Since miniaturization of and the speeding up of device operation is currently in progress, the above-mentioned delay is not negligible as a factor preventing the speeding up.
The present invention provides an input protection circuit or an output protection circuit which realizes the speeding up of a device operation by solving the problem relating to transmission delay of the signal by the protection diode and protection resistors set forth above.
SUMMARY OF THE INVENTION
In order to solve the above problem, the present invention provides an i/o protection circuit for protecting the internal circuit of a device from an excessive voltage applied from an external electrode, characterized in comprising a terminal connected to the external electrode and internal circuit set forth above, a transistor having a first electrode connected to the above terminal, a grounded second electrode and a grounded control electrode and a diode having one end directly connected to the first electrode of the transistor and the other end grounded, the diode being arranged reversely to the voltage applied to the terminal.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a circuit diagram of an i/o protection circuit according to a first embodiment of the present invention.
FIG. 2 shows a pattern layout of the i/o protection circuit in FIG. 1.
FIG. 3 is a cross-sectional view of FIG. 2 taken along line 3--3.
FIGS. 4a, 4b and 4c are circuit schematics for explaining the operation of the i/o protection circuit in FIG. 1.
FIG. 5 shows a pattern layout of the i/o protection circuit according to a second embodiment of the present invention.
FIG. 6 is a cross-sectional view of FIG. 5 taken along line 6--6.
FIG. 7 shows a pattern layout for explaining the i/o protection circuit according to a third embodiment of the present invention.
BEST MODE FOR CARRYING OUT THE INVENTION
An i/o protection circuit according to the present invention will be described with reference to drawings. FIG. 1 is a circuit diagram of the i/o protection circuit 100 according to the first embodiment of the present invention.
The operation of the i/o protection circuit 100 illustrated in FIG. 1 serving as an input protection circuit will be described hereinafter. Denoted at 23 is a terminal connected to an input electrode and an input circuit, 30 is an input protection MOS transistor, 40 is an input protection diode, 51 and 52 are parasitic resistors and 60 is a parasitic bi-polar transistor. The cathode of the input protection diode 40, the drain 30D of the input protection MOS transistor 30 and the emitter of the parasitic bi-pola
REFERENCES:
patent: 4916085 (1990-04-01), Frisina
patent: 5349227 (1994-09-01), Murayama
Fukuda Yasuhiro
Katakura Yoshiaki
Ngo Ngan V.
OKI Electric Industry Co., Ltd.
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