Input/output protecting circuit and a protection element

Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means

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361 90, H02H 904

Patent

active

057127522

ABSTRACT:
Disclosed is a circuit for protecting a semiconductor device from the static electricity by discharging static electricity. When a p+
- diode of positive direction to VDD or a PMOS transistor is not usable because a voltage higher than VDD is applied, a vertical PNP transistor is connected to Vss and positive static electricity is discharged. Negative static electricity is discharged by using an n+/p- diode connected to Vss direction through a semiconductor substrate. Additionally, in case of a circuit to which either a voltage higher than VDD, or a voltage lower than respect to negative static electricity by the operation of a vertical NPN bipolar junction transistor connected to VDD. Positive static electricity is discharged via a p+
- diode connected to VDD.

REFERENCES:
patent: 5521789 (1996-05-01), Ohannes et al.
patent: 5581104 (1996-12-01), Lowrey et al.
patent: 5644460 (1997-07-01), Clukey

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