Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Reexamination Certificate
2011-03-01
2011-03-01
Kindred, Alford W (Department: 2181)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output data buffering
C710S056000
Reexamination Certificate
active
07899958
ABSTRACT:
A mechanism is disclosed for performing I/O operations using queue banks within a data processing system that supports multiple processing partitions. A queue bank is a re-useable area of memory allocated for performing I/O operations. All memory locking and address-translation functions are generally performed only once for a queue bank to reduce system overhead. After a queue bank has been used to perform an I/O operation, some processing is performed to make it available for re-use. This processing determines whether the queue bank contains memory that is being removed from a current processing partition. If so, a delay is imposed so that the queue bank is not made available for immediate re-use. This creates a window of time wherein all queue banks that contain the affected memory are inactive, thereby allowing the affected memory to be removed from the partition without halting on-going I/O activity.
REFERENCES:
patent: 7318140 (2008-01-01), Flemming et al.
patent: 2003/0217184 (2003-11-01), Nair
patent: 2006/0075204 (2006-04-01), Kumar
Kindred Alford W
Marley Robert P.
Martinez David E
Unisys Corporation
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