Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-08-07
2007-08-07
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
10956471
ABSTRACT:
Described are approaches to routing buffered reference clock signals to a plurality of input/output (I/O) cell instances on an integrated circuit (IC) die. All or a subset of the I/O cell instances include clock routing resources optimized to deliver high-speed, low jitter clock signals within and through the particular instance. The clock routing resources in physically adjacent instances of the input/output cells for a given IC die automatically interconnect, collectively forming clock routing infrastructure optimized for groups of cell instances. This modular approach to clock routing simplifies the task of combining I/O cell instances with other I/O cell instances and with other types of circuitry.
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Sebastian Smith, Michael John, “Application-Specific Integrated Circuits.” Copyright 1997 by Addison Wesley Longman, Inc. pp. Cover, publication, 853-899.
Behiel Arthur J.
Chiang Jack
Rambus Inc.
Silicon Edge Law Group LLP
Tat Binh
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