Input/output buffer with reduced ring-back effect

Electronic digital logic circuitry – Interface – Current driving

Patent

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Details

326 86, 326 30, H03K 190175

Patent

active

061337552

ABSTRACT:
An input/output (I/O) buffer with reduced ring-back effect is provided. This I/O buffer is designed for a data transmission bus, such as a GTL+bus, for the transmission of a high-frequency and low-swing data signal. This I/O buffer is designed for the purpose of reducing the undesirable ring-back effect in the I/O buffer. The I/O buffer is characterized by the provision of a variable-resistance device that is connected between the system voltage and the input end of the I/O buffer. The system voltage is set to be equal in magnitude to the high-voltage logic state of the data signal received by the I/O buffer from the data transmission bus. When the input data signal is higher in magnitude than a preset reference voltage, i.e., at the high-voltage logic state, the variable-resistance device is switched to a low resistance value; on the other hand, when the data signal is lower in magnitude than the reference voltage, the variable-resistance device is switched to a near-infinity resistance value. In both cases, no current will flow through the variable-resistance device. This feature can help reduce the ring-back effect in the I/O buffer and also allows the benefits of low power consumption and reduced layout area on the circuit board as compared to the prior art.

REFERENCES:
patent: 5793222 (1998-08-01), Nakase

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