Input/output buffer supporting multiple I/O standards

Details Input/output buffer supporting multiple I/O standards Input/output buffer supporting multiple I/O standards

1997-04-11

1999-09-28

Kizou, Hassan

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output data buffering

710 1, 710 57, 710 58, G06F 1300

Patent

active

059580267

ABSTRACT:
The invention comprises a configurable input/output buffer for an FPGA that can be configured to comply with any of two or more different I/O standards. Factors such as output drive strength, receiver type, output driver type, and output signal slew rate are configurably controlled. In some embodiments, the input power supply and the output power supply can be different from the core voltage supply. In one embodiment, two or more differential amplifiers in the same configurable input buffer use different input reference voltages. According to a second aspect of the invention, the I/O pad are configurably connected to the input reference voltage line. According to a third aspect of the invention, the reference input of an I/O is configurably connected to any of two or more input reference voltage lines. According to another aspect of the invention, a single input reference voltage or a single output voltage supply is applied to each Input/Output Block (IOB), with IOBs grouped into sets. Each set of IOBs has a separate input reference voltage and/or a separate output voltage supply.

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