Input/output buffer capable of accepting an input logic signal h

Details Input/output buffer capable of accepting an input logic signal h Input/output buffer capable of accepting an input logic signal h

1998-05-26

2000-01-04

Tokar, Michael

Electronic digital logic circuitry

Interface

Current driving

326 57, 326112, 326119, 326121, H03K 190175

Patent

active

060114096

ABSTRACT:
An input/output (I/O) buffer is provided for use in an integrated circuit, which is designed in particular to be capable of accepting an input logic signal voltage higher in voltage level than the system voltage. The I/O buffer is designed in such a manner that when the input logic signal drops from the high-voltage logic state to the low-voltage logic state, the voltage at the floating N-well can be raised to near the level of the system voltage. This prevents a latchup effect that occurs in the prior art. Moreover, the I/O buffer can prevent both the output PMOS transistor and the output NMOS transistor from switching into a conducting state at the same time. This prevents the occurrence of an instant short-circuit current in the I/O buffer and also helps to improve the output performance of the I/O buffer.

REFERENCES:
patent: 5396128 (1995-03-01), Dunning et al.
patent: 5748011 (1998-05-01), Takahashi et al.
patent: 5929667 (1999-07-01), Adadeer et al.
patent: 5933025 (1999-08-01), Nance et al.

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