Input circuit for protecting against damage caused by electrosta

Electricity: electrical systems and devices – Safety and protection of systems and devices – With specific current responsive fault sensor

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357 51, 357 43, 357 35, 357 20, 361 56, 361 91, H01L 2978, H01L 2702, H01L 2972, H02H 900

Patent

active

047631848

ABSTRACT:
A circuit for protecting an input MOS FET (Q1) from electrostatic discharge pulses includes a plurality of diodes (D112a through D112f) coupled to the bonding pad (102) of an integrated circuit via a plurality of resistors (R110a through R110f). The resistors prevent excessive current from flowing through and hence damaging any of the diodes. The diodes possess a unique shape which maximizes the perimeter to surface area ratio and therefore permits more efficient energy dissipation along the periphery of the diodes. The diodes are adapted to break down in response to an excessive voltage at the bonding pad and therefor protect the gate structure of the input transistor. Also included in the circuit is a protective bipolar transistor (Q2) having a collector coupled to the bonding pad, an emitter coupled to ground and a base resistively coupled to ground. When a large voltage is applied to the bonding pad and the break down of the diodes is insufficient to limit the voltage at the bonding pad, the collector base junction of the bipolar transistor breaks down thus providing an added element of protection for the input MOS FET. The circuit of the present invention also includes a second resistor diode network which further attenuates the voltage presented to the gate of the input transistor.

REFERENCES:
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Lenzlinger, "Gate Protection of MIS Devices", IEEE Trans. Elect. Dev., vol. FD-18, No. 4, pp. 249-257, (Apr. 1971).

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