Electronic digital logic circuitry – Interface – Current driving
Reexamination Certificate
2002-08-29
2004-06-29
Tan, Vibol (Department: 2819)
Electronic digital logic circuitry
Interface
Current driving
C326S105000, C326S086000, C365S063000, C365S189050, C365S233100
Reexamination Certificate
active
06756815
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This present invention relates generally to the field of integrated circuit design and, more specifically, to an input buffer circuit that has operational characteristics that are selectable depending on the intended application.
2. Description of the Related Art
This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present invention, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present invention. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
Computer systems and other electronic devices typically include a variety of electrically interconnected integrated circuit (IC) packages which perform a variety of functions, including memory and processing functions. Many integrated circuit devices have input buffers, which receive data from outside of the integrated circuit. The input buffer is the first stop for data inside the integrated circuit before the data is stored or further processed. Typically, one input buffer is used for each data input of an integrated circuit.
There are two commonly used types of input buffers: (1) differential input buffers and (2) Complementary Metal Oxide Semiconductor (CMOS) input buffers. Each of these input buffer types has advantages and disadvantages compared to the other.
A differential input buffer is typically used to monitor the transitions of an input signal relative to a fixed reference voltage or relative to a compliment differential signal. The fixed reference voltage may be referred to as V
REF
. The output of a differential input buffer may transition from a logical high (“1”) to a logical low (“0”) or vice versa as the input crosses the threshold established by the reference voltage V
REF
. Differential input buffers typically offer higher performance (faster switching time) than CMOS buffers, but differential input buffers also tend to consume more power than CMOS input buffers. The high power consumption of differential input buffers is in part because differential input buffers have source voltages that are always present, even when the buffer is not in normal operation. These source voltages are partially dissipated by the internal circuitry of the differential buffer, which consumes power. Also, the reference voltage V
REF
is typically always connected to a differential input buffer, resulting in further power consumption.
CMOS input buffers are simpler than differential input buffers. CMOS input buffers do not require the connection of a reference voltage V
REF
. Also, the internal circuitry of CMOS buffers does not consume power when the buffer is not in operation. As a result, CMOS buffers do not generally consume as much power as differential input buffers. A disadvantage of CMOS input buffers is that they do not typically offer performance levels in terms of switching speed associated with differential input buffers.
Power consumption and performance (operational speed) are two important factors in the design of integrated circuits. Accordingly, those factors are important in the design of input buffers, as well. The relationship between power consumption and performance is a classic design tradeoff. This means that an input buffer that is optimized for performance (high speed) typically consumes much more power than an input buffer designed to save power. Correspondingly, an input buffer that is designed to conserve power typically has slower performance characteristics compared to an input buffer that is designed for high performance.
As new designs for computer systems and other electronic devices continue to evolve and proliferate, designers of electronic devices are constantly faced with deciding what performance characteristics they need to incorporate in devices having different operational characteristics. For example, a small portable electronic device such as a cell phone or a personal digital assistant (PDA) may have reduced power consumption as a primary design goal. On the other hand, a high performance desktop computer system that is plugged into a source of AC power most of the time may have higher performance as a more important design goal than low power consumption.
Many computers and electronic devices employ volatile random access memory (RAM) to store information during normal operation. One examples of a type of RAM that is commonly used in a wide range of electronic devices is dynamic random access memory (DRAM), which must be continually updated or “refreshed” to preserve its contents. DRAM is typically used for the main memory of most computer systems. There are many different implementations and types of DRAM, including synchronous DRAM (SDRAM) and double data rate (DDR) SDRAM.
The power consumption and performance tradeoff discussed above is applicable to the choice of input buffers for the DRAM memory in a given electronic device design. This is true because DRAM can have a major impact on the overall power budget of an electronic device. Additionally, the performance of DRAM may have significant impact on the overall performance of an electronic device. In the past, designers of electronic devices may have had to choose a DRAM with CMOS input buffers for certain applications (e.g. low power consumption) and a different DRAM configuration or implementation with differential input buffers for other applications (e.g. higher performance). Specifically, a designer of a cell phone or other small electronic device may have chosen a DRAM with CMOS input buffers to meet a design requirement of low power consumption while a designer of a desktop computer system may have had to choose a different type of DRAM with differential input buffers to meet a design requirement of high system performance. A DRAM having operational characteristics that may be selected depending on the specific application is desirable.
REFERENCES:
patent: 6420899 (2002-07-01), Crittenden et al.
patent: 6437597 (2002-08-01), Chan
patent: 6472904 (2002-10-01), Andrews et al.
patent: 6496403 (2002-12-01), Noda et al.
Fletcher Yoder
Micron Technologies, Inc.
Tan Vibol
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