Input buffer of semiconductor memory device

Details Input buffer of semiconductor memory device Input buffer of semiconductor memory device

2005-06-14

2005-06-14

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Read/write circuit

Signals

C365S189050, C365S225700

Reexamination Certificate

active

06906968

ABSTRACT:
An input buffer of a semiconductor memory device includes a first buffer block for buffering an input data through a delay path selected from a plurality of delay paths, and a second buffer block for buffering an input data strobe signal through a delay path selected from a plurality of delay paths, wherein the plurality of delay paths of the first buffer block and the plurality of delay paths of the second buffer block are identically formed by the same devices, and the corresponding delay paths are selected from the plurality of delay paths according to the same selecting signals. Although the input buffer fails to obtain a margin of a data setup and hold time in an input/output sense amplifier due to variations of the data setup and hold time by maximum and minimum values of tDQSS in a write operation mode, the input buffer can easily obtain the margin of the data setup and hold time in response to a special test mode signal.

REFERENCES:
patent: 5986968 (1999-11-01), Toda et al.
patent: 2003/0086303 (2003-05-01), Jeong

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