Input buffer having adjustment function for suppressing skew

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction

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Details

326 22, 327 74, 327 75, H03K 1716

Patent

active

061373060

ABSTRACT:
An input buffer of the present invention includes: a plurality of receiver circuits for performing different phase adjustments on an input signal, and outputting the differently phase-adjusted signals; a pattern detection circuit for detecting a period of time for which a voltage of the input signal has remained unchanged; and a signal selection circuit for selecting one of the output signals received from the receiver circuits based on the detection result from the pattern detection circuit.

REFERENCES:
patent: 4424458 (1984-01-01), Buck et al.
patent: 4682052 (1987-07-01), Kyomasu
patent: 5349246 (1994-09-01), McClure
patent: 5642063 (1997-06-01), Lehikoinen
patent: 5703505 (1997-12-01), Kwon
patent: 5990700 (1999-11-01), Park

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