Input buffer for a high density programmable logic device

Details Input buffer for a high density programmable logic device Input buffer for a high density programmable logic device

1994-11-17

1997-09-16

Wambach, Margaret Rose

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Current driver

327165, 327206, 327234, 327276, 327382, H03K 19084

Patent

active

056684886

ABSTRACT:
An input buffer which provides compensation for the RC time delay introduced by a switch matrix of a high density programmable logic device (PLD). The input buffer includes circuitry to provide an input threshold which varies to compensate for the RC delay of the switch matrix to produce an output which transitions when a signal input to the switch matrix transitions through a predetermined value.

REFERENCES:
patent: 4355284 (1982-10-01), Acker
patent: 4539489 (1985-09-01), Vaughn
patent: 4617529 (1986-10-01), Suzuki
patent: 5012141 (1991-04-01), Tomisawa
patent: 5347177 (1994-09-01), Lipp
patent: 5396109 (1995-03-01), Oshiba
IBM Technical Disclosure Bulletin vol. 36, No. 09A, Sep. 1993; Process Tracking Delay Element p. 87.

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