Input buffer circuit for receiving multiple level input voltages

Details Input buffer circuit for receiving multiple level input voltages Input buffer circuit for receiving multiple level input voltages

1983-11-10

1985-03-12

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307246, 307264, 307279, 307360, 307446, H03K 19092, H03K 19094

Patent

active

045047472

ABSTRACT:
An input buffer circuit having a single input for receiving input voltages characterized by having varying voltage swings is provided. First and second inverter circuits having differing switchpoint voltages are coupled to a level shifting position. The level shifting portion varies the level of swing of the input voltage and buffers the input voltage. In one form, voltage coupling circuitry is interposed between the level shifting portion and a latching portion which provides the input voltage as an output signal at a predetermined voltage level. In another form, voltage coupling circuitry controlled by control circuitry couples the output of the level shifting portion to an output in response to the input voltage.

REFERENCES:
patent: 4080539 (1978-03-01), Stewart
patent: 4321491 (1982-03-01), Atherton et al.
patent: 4438352 (1984-03-01), Mardkha
patent: 4446390 (1984-05-01), Alaspa
patent: 4450371 (1984-05-01), Bismarck
patent: 4463273 (1984-07-01), Dingwall
patent: 4464587 (1984-08-01), Suzuki et al.
patent: 4472647 (1984-09-01), Allgood et al.
Lee et al., "Voltage Level Transfer Driver Circuits", IBM TDB, vol. 25, No. 11B, Apr., 1983, pp. 6068-6069.
Rock, "Positive Ground Bounce Protection Circuit", IBM TDB, vol. 22, No. 4, Sep., 1979, pp. 1409-1410.
Elliott et al., "Regenerative TTL Receiver Using Enhancement and Depletion FET Devices", IBM TDB, vol. 18, No. 10, Mar., 1976, pp. 3259-3260.

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