Input buffer circuit

Details Input buffer circuit Input buffer circuit

1999-04-28

2000-11-14

Tokar, Michael

Electronic digital logic circuitry

Interface

Current driving

326 86, 365191, H03K 190175

Patent

active

061475122

ABSTRACT:
An input buffer circuit includes a transition detecting unit for receiving an input signal, detecting a transition of the input signal, and outputting a detecting signal and a delayed input signal; a detecting signal summing unit for summing up the detecting signal and other detecting signals outputted from other transition detecting units, and outputting a plurality of summed signals; a buffer unit for transmitting the delayed input signal in accordance with the plurality of summed signals; a control signal generator for receiving one of the plurality of summed signals and a first control signal, and outputting a second control signal and a third control signal; and a write driver 204 for receiving the second and third control signals, and transmitting an output signal of the buffer unit to a cell by a trigger of the plurality of summed signals.

REFERENCES:
patent: 4794567 (1988-12-01), Akatsuka
patent: 5305282 (1994-04-01), Choi
patent: 5761136 (1998-06-01), Park et al.
patent: 5926043 (1999-07-01), Jang

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