Input buffer capable of reducing input capacitance seen by...

Details Input buffer capable of reducing input capacitance seen by... Input buffer capable of reducing input capacitance seen by...

2006-08-15

2006-08-15

Barnie, Rexford (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Input noise margin enhancement

C326S021000, C326S022000, C326S023000, C326S026000, C326S027000, C326S083000, C326S086000

Reexamination Certificate

active

07091741

ABSTRACT:
Provided is an input buffer whose input capacitance presented to input signals can be reduced. The input buffer includes a first differential amplifier which compares the sizes of a first input signal and a second input signal and outputs an output signal as the result of the comparison; a second differential amplifier which compares the sizes of the first input signal and a reference voltage and outputs a second output signal as the result of the comparison; and a third differential amplifier which compares the sizes of the second input signal and the reference voltage and outputs a third output signal as the result of the comparison, wherein the first differential amplifier shares transistors, to which the first and second input signals are input, with the second and third differential amplifiers. The first differential amplifier operates only in a differential operation mode, and the second and third differential amplifiers operate only in a single operation mode. The phase of the first input signal is opposite to the phase of the second input signal, and the first and second input signals are different signals in the single operation mode. Accordingly, an input buffer is advantageous in that both a differential signal pair and single-ended signals can be received and output and the input capacitance of the input buffer seen by the input signals can be reduced.

REFERENCES:
patent: 5166956 (1992-11-01), Baltus et al.
patent: 6573760 (2003-06-01), Gabara
patent: 6831507 (2004-12-01), Granville

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