Input and output circuit and method of operation thereof

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Clock or pulse waveform generating

Reexamination Certificate

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Details

C327S078000

Reexamination Certificate

active

11226564

ABSTRACT:
An input and output circuit includes a common input and output node, an abnormal voltage detector and a clock generating circuit. The common input and output node is used as an output node in a normal operation mode and used as an input node in a test operation mode where an abnormal voltage level is inputted to the common input and output node. The abnormal voltage detector generates an abnormal voltage signal based upon a detection of the abnormal voltage level at the common input and output node in the test operation mode. The clock generating circuit outputs a first clock signal to the common input and output node in the normal operation mode and outputs a second clock signal to an external circuit in response to the abnormal voltage signal in the test operation mode. Therefore, time and expenses for testing the input and output circuit may be reduced.

REFERENCES:
patent: 7017090 (2006-03-01), Endou et al.
patent: 11-327711 (1999-11-01), None
patent: 2001-268810 (2001-09-01), None
patent: 2002-186173 (2002-06-01), None
patent: 0312929 (2001-10-01), None
patent: 0280002 (2002-06-01), None
English Abstract for Publication No.:10-0312929.
English Abstract for Publication No.: 20-0280002.

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