Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices
Reexamination Certificate
2009-11-25
2010-11-02
Lee, Calvin (Department: 2892)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Making plural separate devices
C257S676000
Reexamination Certificate
active
07824963
ABSTRACT:
Apparatuses and methods for inkjet printing electrical interconnect patterns such as leadframes for integrated circuit devices are disclosed. An apparatus for packaging includes a thin substrate adapted for high temperature processing, and an attach pad and contact regions that are inkjet printed to the thin substrate using a metallic nanoink. The nanoink is then cured to remove liquid content. The residual metallic leadframe or electrical interconnect pattern has a substantially consistent thickness of about 10 to 50 microns or less. An associated panel assembly includes a conductive substrate panel having multiple separate device arrays comprising numerous electrical interconnect patterns each, a plurality of integrated circuit devices mounted on the conductive substrate panel, and a molded cap that encapsulates the integrated circuit devices and associated electrical interconnect patterns. The molded cap is of substantially uniform thickness over each separate device array, and extends into the space between separate device arrays.
REFERENCES:
patent: 6045942 (2000-04-01), Miekka et al.
patent: 6664615 (2003-12-01), Bayan et al.
patent: 2009/0020829 (2009-01-01), Chandra et al.
patent: 2009/0267216 (2009-10-01), Walberg et al.
patent: 2010/0022078 (2010-01-01), Rockenberger et al.
Nguyen Luu T.
Poddar Anindya
Walberg Randall L.
Beyer Law Group LLP
Lee Calvin
National Semiconductor Corporation
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