Infrared sensitive silicon substrate with integrated electronic

Adhesive bonding and miscellaneous chemical manufacture – Delaminating processes adapted for specified product – Delaminating in preparation for post processing recycling step

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156662, 156901, 156DIG64, 427 82, 427 93, 427 96, H01L 2702

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active

046529012

ABSTRACT:
An integrated circuit arrangement including an infrared sensitive silicon substrate having an epitaxial layer with integrated electronic processing devices applied to the major surface thereof, wherein the epitaxial layer is partially etched away to expose the detector region of the substrate. The exposed detector region is then connected to the processing devices by either a shallow diffusion or by other means. A method for producing such an arrangement, preferably using a crystal orientation dependent etching medium for etching the epitaxial layer, is also disclosed.

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patent: 4430149 (1984-02-01), Berkman
K. Nummedal et al., "Extrinsic Silicon Monolithic Focal Plane Array Technology and Applications", Proceedings of the International Conference on the Application of Charge-Coupled Devices, 1975, pp. 19-30.
A. J. Steckl, "Low Temperature Silicon CCD Operation", Proceedings of the 1975 International Conference on the Application of Charge-Coupled Devices, pp. 383-388.
D. M. Erb et al., "Buried Channel Charge-Coupled Devices for Infrared Applications", Proceedings of the CCD Application Conference (Sep. 1973), pp. 157-167.
W. S. Boyle et al., B.S.T.J. Briefs, "Charge-Coupled Semiconductor Devices", Jan. 29th, 1970, pp. 587-593.
Rakesh Kumar et al., "Characterization of Plasma Etching For Semiconductor Applications", Solid State Technology, Oct. 1976, pp. 54-59.
John R. Devaney et al., "Plasma Etching PROMS and Other Problems", Solid State Technology, Dec. 1974, pp. 46-50.
D. E. French, "Use of Charge-Coupled Devices in Infrared Sensor Systems", SPIE vol. 62, Infrared Technology, 1975, pp. 13-25.

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