Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
2006-02-28
2006-02-28
Perveen, Rehana (Department: 2112)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S105000
Reexamination Certificate
active
07007120
ABSTRACT:
Systems and methods of information transfer are disclosed. In one embodiment, the system may comprise a master device and a slave device coupled by a bus in which clock information is embedded in the data stream. Various flow control techniques may be used to compensate for differences in transfer rates supported by the master and slave devices. Two types of synchronization fields may be employed to establish and maintain clock acquisition. The master device may transfer information to the slave device using a sync field of a first type followed by a first data packet, and the slave device may respond to each data packet with a sync field of a second, different type, followed by a status ready field if no additional time is needed before receiving another data packet.
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Mejia Robert G.
Spencer Andrew M.
Cerullo Jeremy S.
Perveen Rehana
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