Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2008-05-22
2011-11-15
Bragdon, Reginald (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S154000, C711SE12021, C710S038000
Reexamination Certificate
active
08060702
ABSTRACT:
According to one embodiment, an information reproducing apparatus includes a memory, a decoder, an intermediate memory which is disposed between the memory and the decoder and which temporarily stores, in succession, the data that are supplied from the memory and then outputs the data to the decoder, switching circuit for switching an output of the memory to one of the decoder and the intermediate memory, memory management circuit for managing arrangement information of the data that are stored in the memory, determination circuit for determining whether the data that are stored in the memory are arranged in physically discontinuous memory areas of the memory, and switching control circuit for switching, in a case where the determination circuit determines that the data are arranged in the physically divided memory areas, the switching circuit in a manner to input the data output from the memory to the decoder via the intermediate memory.
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patent: 2003/0105926 (2003-06-01), Rodriguez
patent: 2005/0066063 (2005-03-01), Grigorovitch et al.
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Japanese Office Action dated Jul. 5, 2011.
Bragdon Reginald
Faal Baboucarr
Kabushiki Kaisha Toshiba
Pillsbury Winthrop Shaw & Pittman LLP
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