Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2007-02-08
2010-10-05
Verbrugge, Kevin (Department: 2189)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S003000, C711S105000, C711SE12014, C714S006130
Reexamination Certificate
active
07809920
ABSTRACT:
In an information processor including memory devices such as DRAMs and others, by reducing the power consumption of memory devices and efficiently repairing defect bits, a highly reliable information processor is realized. In an information processor including an external memory such as a DRAM, a second memory whose power consumption at the access time is smaller than that of the external memory is disposed, and cache data of the external memory and repair data are stored in this second memory. To an input address given from a central processing unit via a primary cache controller, a memory controller determines a hit or a miss with reference to a tag memory for cache and a tag memory for repair, and when one or both of tag memory for cache and a tag memory for repair are hit, it accesses the second memory.
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Ozawa Motokazu
Sekiguchi Tomonori
Watanabe Takao
Hitachi , Ltd.
Loonan Eric
Miles & Stockbridge P.C.
Verbrugge Kevin
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