Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2011-07-05
2011-07-05
Misiura, Brian T (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S305000, C713S300000, C713S320000, C713S323000, C320S103000, C320S124000, C307S043000
Reexamination Certificate
active
07975091
ABSTRACT:
According to one embodiment, an information processor has: an input/output module configured to input/output a data signal through a data signal line; a first voltage supply module configured to supply a first differential signal pair; a second voltage supply module configured to supply a second differential signal pair; a first switching module configured to select and output, in response to a first control signal, one of the first differential signal pair supplied from the first voltage supply module and the second differential signal pair supplied from the second voltage supply module; and a second switching module configured to receive one of the first differential signal pair and the second differential signal pair output from the first switching module, and output one of the first differential signal pair and the second differential signal pair to the electronic device through the data signal line, in response to a second control signal.
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Notice of Rejection mailed by JPO on Dec. 8, 2009 in the corresponding Japanese patent application No. 2008-324487.
Notice of Rejection mailed by JPO on Mar. 9, 2010 in the corresponding Japanese patent application No. 2008-324487.
Decision to Grant a Patent mailed by JPO on May 18, 2010 in the corresponding Japanese patent application No. 2008-324487.
Explanation of Non-English Language References.
Kabushiki Kaisha Toshiba
Knobbe Martens Olson & Bear LLP
Misiura Brian T
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