Information processor and method of its component arrangement

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation

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Details

710101, 710104, 710126, 710128, 710129, 710 2, 710 8, 364240, G06F 1300

Patent

active

061087319

DESCRIPTION:

BRIEF SUMMARY
TECHNICAL FIELD

The present invention relates in general to information processors, such as a personal computer and a workstation, each of which is capable of mounting thereon a plurality of processors, and more particularly to a printed circuit board layout of buses and components which is suitable for these information processors.


BACKGROUND ART

In recent years, a client server system employing a personal computer (PC) has come into wide use due to down-sizing. In the client server system, a server executes the database retrieval for example in response to requests from a plurality of clients, and hence a high data processing capability is required therefor. For this reason, there has developed a construction which employs an operating system (OS) for a multiprocessor and in which a plurality of processors are mounted on a PC used as a server (hereinafter, the PC of this sort is particularly referred to as "a PC server" for short, when applicable) to construct an operating system and the processings are distributed among these processors.
As for a system for mounting a plurality of processors on one PC, there is known a system employing a processor board. Conventionally, this system is a system which has been used in a relatively large scale workstation or personal computer. This system is such that a board (a processor board) on which one or two processors and a cache system are mounted is connected through a connector to a system bus which is distributed on a main board and which is called a shared bus in order to be used. On the main board, there are disposed a memory interface, a memory module, an I/O bus bridge, an I/O interface board and the like. The details of this system are described in an article of "MULTIPROCESSOR SYSTEM ARCHITECTURE", p. 269, published by PRENTICE HALL Corporation.
In the system employing the processor board as described above, an interface LSI for a connector and a shared bus is required every processor board. In addition, in order to enhance the performance of the system, the cache system and the clock generator which is locally arranged are mounted on the processor board. As a result, the number of components of the overall system is increased. In addition, since the high speed shared bus signals are connected through the connector, the price of the system becomes relatively high due to the factors such as the use of the connector through which the signal is transmitted with less distortion and which is excellent in electrical characteristics and the complicated chassis structure resulting from the fixing of a plurality of boards.
For this reason, in recent years, as the integration of the LSIs has been increased, the processor which self-contains the bus interface and the cache for use in constructing the multiprocessor is also on the market. Then, a plurality of processors, the memories-and the I/O interface are disposed on one main board by employing such a processor.
Now, the interchangeability of the I/O interfaces is very important in the PC server. The I/O interfaces for the PC are on the market in the form of the expansion boards, and hence a user may select and purchase desired ones on the basis of the performance and the introduction cost which are required for the server system. In addition, it is also widely carried out that a user himself/herself attaches and detach the expansion cards thereto and therefrom. In such a way, if the I/O interfaces are made common and also the operating hardware is not limited, this assists the free price competition among the I/O expansion board makers, and also a user can always construct the system which is excellent in price-to-performance ratio by employing the newest and high performance products.
Currently, in the PC server, the I/O bus specification called a PCI is widely used. The PCI bus is the local bus for which the standardization is in progress under the leadership of INTEL CO. LTD., U.S.A., by the standardization group i.e., the PCI Special Interest Group, and the expansion boards each conforming to this specif

REFERENCES:
patent: 5175515 (1992-12-01), Abernathy et al.
patent: 5442520 (1995-08-01), Kemp et al.

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