Information processing unit with a clock control circuit...

Electrical computers and digital processing systems: support – Clock control of data processing system – component – or data...

Reexamination Certificate

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Details

C713S500000, C713S502000

Reexamination Certificate

active

07155631

ABSTRACT:
An information processing unit has a system bus that connects devices configuring the information processing unit. An arbiter performs arbitration related to use of this system bus, and a clock control circuit controls the clock to be supplied to the devices. The clock control circuit can make a bus request to the arbiter and executes a clock switch or clock halt after being granted use of the bus by the arbiter.

REFERENCES:
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patent: 6163848 (2000-12-01), Gephardt et al.
patent: 6496938 (2002-12-01), Fry et al.
patent: 6496940 (2002-12-01), Horst et al.
patent: 6625743 (2003-09-01), Gulick
patent: 6643792 (2003-11-01), Kurosawa
patent: 197 06 496 (1997-02-01), None
patent: 07-152449 (1995-06-01), None
patent: 2000-020462 (2000-01-01), None
patent: 2000-276436 (2000-10-01), None
patent: 2001-051747 (2001-02-01), None
patent: 2002-007316 (2002-01-01), None
Japanese Office Action dated Dec. 1, 2004 with a partial English translation.
European Search Report dated Jan. 9, 2006.

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