Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2008-07-01
2008-07-01
Bragdon, Reginald (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S112000
Reexamination Certificate
active
11055099
ABSTRACT:
According to the present invention, for reliably carrying out a request for access to processing data which is an object of processing in a data processing apparatus even if the processing data is not retained in a storage unit, the storage unit includes a first timer for detecting the fact that an elapsed time for the readout processing in the readout unit reaches a first predetermined time set in advance, and a first response unit for, when the processing in the readout unit continues after the detection of the first predetermined time by the first timer, transmitting a signal indicative of normal in-operation to the data processing apparatus. Moreover, the data processing apparatus includes an implementation unit for, when receiving the signal indicative of the normal in-operation from the first response unit, conducting the processing on the re-issue of the processing data access request.
REFERENCES:
patent: 6233653 (2001-05-01), Abe et al.
patent: 7032128 (2006-04-01), Nakano
patent: 2003/0149918 (2003-08-01), Takaichi
patent: 5-88975 (1993-04-01), None
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Bragdon Reginald
Flournoy Horace L
Fujitsu Limited
Staas & Halsey , LLP
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