Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
1995-10-25
2001-07-03
Dharia, Rupal (Department: 2181)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S100000, C710S113000, C710S120000, C710S120000, C709S207000, C709S208000, C709S212000, C709S213000, C709S225000, C709S227000
Reexamination Certificate
active
06256696
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an information processing system comprising a plurality of modules which are notably constituted on the basis of a processor and of a local bus which serves various peripherals.
The invention likewise relates to telecommunications equipment comprising a plurality of modules which are notably constituted on the basis of a processor and of a local bus which serves various peripherals, and notably of a multiplexer of data transmitted according to the synchronous digital hierarchy (SDH).
2. Description of the Related Art
In many information processing systems, it is typical to utilize a plurality of processor-based modules for the purpose of redundance or for the purpose of distributing the information processing so as to increase the performance of the system. For example, it is possible to shift a processing-time consuming function to a dedicated module, or in telecommunications equipment, to use a first module dedicated to the management of the equipment, and a second module dedicated to the management of the communications.
The problem which then appears is that of getting the various modules to communicate with each other.
French Patent Application No. 2667175, filed by the Assignee on Sep. 25, 1990, describes a method for putting processors in communication via a common memory whose access is controlled by an arbitration circuit.
However, the arbitration circuits which are commercially available at present make it possible to manage only the dynamic memory. The field of application of such a method is thus limited.
SUMMARY OF THE INVENTION
It is notably an object of the invention to propose an information processing system which comprises a plurality of modules, and in which each processor of each module has the possibility of accessing all the peripherals of the other modules: dynamic and static memories, relays, electroluminescent lamps, communication elements . . . .
Therefore, an information processing system according to the invention and as defined in the opening paragraph is characterized in that it comprises an inter-module bus intended to serve as a temporary link between two modules, and connected to each module via at least one two-way buffer stage, and in that said modules comprise means enabling a processor of any first module to become temporarily the master of the local bus of any second module, so as to have direct access to the peripherals of said second module.
When there is no exchange of data, each processor is independent and works locally on its own bus by utilizing the resources which are connected thereto. On the other hand, when an exchange of data is necessary, for example, when the processor of a first module wishes to read the static memory of a second module, the processor of said second module is temporarily put in the stand-by mode, and that of said first module becomes the master of the local bus of said second module which is put in direct contact with the local bus of said first module via two-way buffer stages and an inter-module bus, so that an exchange of data takes place. Thus, the static memory of said second module is temporarily considered a peripheral of the processor of said first module.
These and other aspects of the invention will be apparent from and elucidated, by way of example, with reference to the embodiments described hereinafter.
REFERENCES:
patent: 3634830 (1972-01-01), Baskin
patent: 4209839 (1980-06-01), Bederman
patent: 4270167 (1981-05-01), Koehler et al.
patent: 4368514 (1983-01-01), Persaud et al.
patent: 4481578 (1984-11-01), Hughes et al.
patent: 4777590 (1988-10-01), Durkos et al.
patent: 5131081 (1992-07-01), MacKenna et al.
patent: 5568617 (1996-10-01), Kametani
patent: 2667175 (1992-03-01), None
Dharia Rupal
U.S. Philips Corporation
Verdonk Peter
LandOfFree
Information processing system comprising at least two... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Information processing system comprising at least two..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Information processing system comprising at least two... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2541279