Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output access regulation
Reexamination Certificate
2011-01-18
2011-01-18
Tseng, Cheng-Yuan (Department: 2184)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output access regulation
C710S040000, C710S058000
Reexamination Certificate
active
07873759
ABSTRACT:
Provided is an information processing system that communicates with a storage apparatus through a plurality of paths Pi(i=1 to n, where n is a total number of the paths), and that issues an I/O to the storage apparatus through one of the paths Pi. The information processing system sets weights Wifor the respective paths Pi; obtains an I/O issue interval diof each of the paths Piby dividing a sum total ΣWiof the weights Wiby the weight Wiset for the path Pi; obtains I/O issue timings ti(m)of each of the paths Piby using the following equation: ti(m)=di/C+m·di(m=0, 1, 2, . . . ) (where C is a constant); and issues the I/Os to the paths Piin an order corresponding to the an order of the I/O issue timings ti(m) chronologically arranged.
REFERENCES:
patent: 5253248 (1993-10-01), Dravida et al.
patent: 5812549 (1998-09-01), Sethu
patent: 5920852 (1999-07-01), Graupe
patent: 5991835 (1999-11-01), Mashimo et al.
patent: 6182120 (2001-01-01), Beaulieu et al.
patent: 6249800 (2001-06-01), Aman et al.
patent: 6434631 (2002-08-01), Bruno et al.
patent: 6542944 (2003-04-01), D'Errico
patent: 6587844 (2003-07-01), Mohri
patent: 6788686 (2004-09-01), Khotimsky et al.
patent: 6871011 (2005-03-01), Rahman et al.
patent: 6973529 (2005-12-01), Casper et al.
patent: 7016971 (2006-03-01), Recio et al.
patent: 7017138 (2006-03-01), Zirojevic et al.
patent: 7107593 (2006-09-01), Jones et al.
patent: 7123620 (2006-10-01), Ma
patent: 7277984 (2007-10-01), Ghosal et al.
patent: 7292594 (2007-11-01), Meempat et al.
patent: 7313629 (2007-12-01), Nucci et al.
patent: 7492717 (2009-02-01), Mosko
patent: 7634408 (2009-12-01), Mohri
patent: 7675863 (2010-03-01), Werb et al.
patent: 7680055 (2010-03-01), Ramakrishnan et al.
patent: 7701858 (2010-04-01), Werb et al.
patent: 7707345 (2010-04-01), Diao et al.
patent: 2002/0078267 (2002-06-01), Rozario et al.
patent: 2002/0174047 (2002-11-01), Fernholz
patent: 2003/0065871 (2003-04-01), Casper et al.
patent: 2005/0086363 (2005-04-01), Ji
patent: 2008/0151753 (2008-06-01), Wynne
patent: 2008/0301492 (2008-12-01), Honda et al.
patent: 2009/0043486 (2009-02-01), Yang et al.
patent: 2009/0113042 (2009-04-01), Bivens et al.
patent: 6-035831 (1994-02-01), None
patent: 10-289189 (1998-10-01), None
patent: 2002-197046 (2002-07-01), None
patent: 2004-185327 (2004-07-01), None
Kobayashi Nobuo
Tomonaga Shigenori
Yokouchi Hiroshi
Brundidge & Stanger, P.C.
Hitachi , Ltd.
Tseng Cheng-Yuan
LandOfFree
Information processing system and method of allocating I/O... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Information processing system and method of allocating I/O..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Information processing system and method of allocating I/O... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2712807