Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2005-07-06
2008-12-02
Chaudry, Mujtaba K. (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S754000, C714S769000, C714S798000
Reexamination Certificate
active
07461326
ABSTRACT:
The information processing method of the present invention detects redundant circuits as described below by means of an information processor that is provided with: a storage unit for storing circuit operation information that uses hardware description language and a library for performing a logic synthesis of the circuit operation information and converting to a net list; and a display unit. The information processor hierarchically arranges statement by statement the circuit operation information that is stored in the storage unit, and then refers to the library, performs a logic synthesis of the circuit operation information that has been hierarchically arranged and converts to a net list. The information processor then detects redundant fault sites, which are sites that are logically redundant from the net list, and displays information showing the redundant circuits that contain the redundant fault sites on the display unit.
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Japanese Office Action dated Aug. 27, 2008 with Partial English Translation.
Alphonse Fritz
Chaudry Mujtaba K.
McGinn IP Law Group PLLC
NEC Corporation
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