Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2006-04-11
2006-04-11
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S113000, C711S118000, C711S144000
Reexamination Certificate
active
07028151
ABSTRACT:
When an input address AD is previously stored in a register211, if a matching signal EQ1is active, then an address queue control circuit19A latches an offset of the input address AD into a register241, or else, latches the input address AD into a register212through a selector262. When the input address AD is previously stored in the register241, the address queue control circuit19A latches the input address AD into the register212through the selector262. After reading the contents of the register211, the address queue control circuit19A shifts the offset OFS of the register241to the offset field of the register211through a selector261, and resets a valid flag EF of the register241.
REFERENCES:
patent: 5813045 (1998-09-01), Mahalingaiah et al.
patent: 6321301 (2001-11-01), Lin et al.
Hayakawa Fumihiko
Imai Satoshi
Suga Atsuhiro
Fujitsu Limited
Kim Matthew
Patel Hetul
Staas & Halsey , LLP
LandOfFree
Information processing device equipped with improved address... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Information processing device equipped with improved address..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Information processing device equipped with improved address... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3552504