Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2011-04-12
2011-04-12
Baderman, Scott T (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S005110, C714S042000, C713S002000
Reexamination Certificate
active
07925928
ABSTRACT:
After power activation, a transferer14detects a bootstrap program111having a first error check code114assigned thereto and being stored in a first storage device11, subjects the bootstrap program111to an error detection/correction process, and transfers the bootstrap program111to the second storage device12. If the transfer is properly completed, by executing the bootstrap program111on the second storage device12, the CPU10performs an error detection/correction process for a main program112having a second error check code115assigned thereto, and transfers the main program112to a third storage device13, after which the CPU's control branches out to the main program112on the third storage device13. As a result, system boot can be performed without employing a NOR type flash memory.
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Korean Office Action issued in Korean Patent Application No. 10-2004-0112238, mailed Jan. 7, 2011.
Mino Yoshiteru
Sumida Keizo
Yamamoto Yasunori
Baderman Scott T
Butler Sarai
McDermott Will & Emery LLP
Panasonic Corporation
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