Information processing apparatus and method, memory control...

Details Information processing apparatus and method, memory control... Information processing apparatus and method, memory control...

2007-12-25

2007-12-25

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read/write circuit

Simultaneous operations

C365S230050, C365S205000

Reexamination Certificate

active

11360301

ABSTRACT:
A memory control device for writing to a memory data input via a port section and for reading from the memory data output via the port section includes setting means for setting, in accordance with a transfer speed of first input data input via the port section, a write-enable time for enabling writing of the first input data for each predetermined period and for setting, in accordance with a transfer speed of first output data output via the port section, a read-enable time for enabling reading of the first output data for the predetermined period; and write/read control means for controlling data writing/reading to/from the memory such that second input data input via the port section is written or second output data output via the port section is read within a time other than the write-enable and read-enable times within the predetermined period.

REFERENCES:
patent: 5847990 (1998-12-01), Irrinki et al.
patent: 2004/0075858 (2004-04-01), Namizuka
patent: 2000 244518 (2000-09-01), None
patent: 2002 132707 (2002-05-01), None
patent: 2003 16024 (2003-01-01), None
patent: 2004 62900 (2004-02-01), None

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